`timescale 1ns/1ns
module yuhuofeimen_tb();
reg a,b,c,d;
wire out;
yuhuofeimen U(a,b,c,d,out);
initial
begin
a=0;b=0;c=0;d=0;#100;
a=0;b=0;c=0;d=1;#100;
a=0;b=0;c=1;d=0;#100;
a=0;b=0;c=1;d=1;#100;
a=0;b=1;c=0;d=0;#100;
a=0;b=1;c=0;d=1;#100;
a=0;b=1;c=1;d=0;#100;
a=0;b=1;c=1;d=1;#100;
a=1;b=0;c=0;d=0;#100;
a=1;b=0;c=0;d=1;#100;
a=1;b=0;c=1;d=0;#100;
a=1;b=0;c=1;d=1;#100;
a=1;b=1;c=0;d=0;#100;
a=1;b=1;c=0;d=1;#100;
a=1;b=1;c=1;d=0;#100;
a=1;b=1;c=1;d=1;#100;
end
endmodule